About Me

I am an MS/Ph.D. student in the Electrical Engineering department at Rice University, where I work in Dr. Behnaam Aazhang's lab. My research focuses on developing mathematical frameworks for understanding and learning from neurological data. I am passionate about all things related to electrical engineering and frequently study topics outside my immediate field, including computer architecture (ask me about RISC-V sometime!) and quantum mechanics.

My hobbies include teaching and advising undergraduates in electrical engineering, reading (a lot), playing volleyball, and listening to music.

Contact Details

Jennifer Hellar
jenniferhellar@gmail.com
Rice: jlh24@rice.edu

Education

Rice University

MS/Ph.D. in Electrical Engineering • August 2020 - Present

Research focus: Signal processing and machine learning for neuroengineering problems in collaboration with experts in the Houston Medical Center.

Rice University

B.S. in Electrical Engineering • summa cum laude • May 2019

Key Coursework: High Performance Computer Architecture; Computer Systems Architecture; Advanced VLSI Design; Digital Logic Design; Implementation of Digital Systems; Signals, Systems, and Learning; Random Signals; Physics of Sensors; Quantum Mechanics

Work

Cirrus Logic

Graduate Processor Architecture Intern • September 2019 - May 2020

Created an automated Python-based framework for compiling a suite of C benchmarks and extracting code size data (at the benchmark and function level) into a user-friendly Excel workbook. Compared ISA performance of RISC-V versus ARM using multiple toolchains. Proposed ISA extensions for RISC-V to improve code size for embedded benchmarks and estimated code size reductions with the extensions. Documented methods and findings in a detailed technical report.

Octavo Systems

Applications Engineering Intern • June 2019 - August 2019

Provided support to customers designing embedded systems with Octavo System-in-Package products. Performed failure analysis on failed production units, and documented the production test process.

Chevron Information Technology Company

Industrial Network Design & Consulting Intern • Summer 2018

Researched Power Line Communications technology. Initiated contact with vendors, aggregated technical data, and tested demo equipment.

Skills

PCB Design

Eagle CAD
Schematic, board layout and tracing, part creation.
Soldering
Processor, sensors, passives.
Debugging
Oscilloscope, multimeter, breadboard.

FPGA Design

Xilinx Vivado High-Level Synthesis
C, C++ module with HLS pragmas and associated testbench for C simulation.
MATLAB Simulink System Generator
Sysgen models for matrix multiplication, QR decomposition, 4x4 linear system solver.

Embedded Application Code

Assembly
ARM Thumb-2, ARM MVE, RISC-V RV32-IMC.
C
SPI, I2C, UART, ADC, timer modules on MSP430 processors.
Linux
I2C, GPIO for integrating Beagleboard/Raspberry Pi-style computer with external sensor and display.

High-Level Coding Languages

Python
Text file parsers and Excel writer. Simple Windows GUI. Assorted algorithms.
MATLAB
Filters, system solvers, data visualization and manipulation.

Other

Git
LaTeX (Overleaf)
Microsoft Office Suite